Typically, a semiconductor memory device receives a power supply voltage VDD and a ground voltage VSS from a source outside the semiconductor memory device, and the semiconductor memory device generates and uses internal voltages required for internal operations. The internal voltages required for internal operations of the semiconductor memory device include a core voltage VCORE supplied to a memory core area, a boost voltage VPP used for driving a word line or during overdriving, and a back bias voltage VBB supplied as a bulk voltage to an NMOS transistor in the core area.
The core voltage VCORE may be supplied by reducing the power supply voltage VDD to a predetermined level. The boost voltage VPP has a higher level than the power supply voltage VDD, and the back bias voltage VBB maintains a lower level than the ground voltage VSS inputted from outside. Therefore, a voltage pump is required to perform a pumping operation for supplying charges for the boost voltage VPP and the back bias voltage VBB.
FIG. 1 is a block diagram illustrating a configuration of a conventional internal voltage generation circuit.
Referring to FIG. 1, the conventional internal voltage generation circuit includes a detector 11, an oscillator 12, and a voltage pump 13. The detector 11 is configured to generate a detection signal DET which is enabled to a logic high level when an internal voltage VINT has a lower level than a reference voltage VREF. The oscillator 12 is configured to generate an oscillation signal OSC as a periodic signal when the detection signal DET, enabled to a logic high level, is inputted. The voltage pump 13 is configured to pump the internal voltage VINT when the oscillation signal OSC is inputted. The internal voltage generation circuit configured in such a manner is used for generating a boost voltage VPP or a back bias voltage VBB, and implemented as a separate circuit for each internal voltage.
However, when the internal voltage VINT is excessively consumed during operation of a semiconductor memory device, the level of the internal voltage VINT may be decreased to cause an operation error. Therefore, when consumption of the internal voltage VINT is large, the conventional internal voltage generation circuit increases the drivability for driving the internal voltage VINT by reducing a cycle of the oscillation signal OSC or increasing the number of voltage pumps. However, when the cycle of the oscillation signal OSC is reduced in a state where the number of voltage pumps is maintained, the pump efficiency decreases, and when the number of voltage pumps is increased, the layout area increases.